Tricky things switching power supplies. Not the ‘simple’ integrated FET switching regulators with internal compensation and all that jazz. No, I mean the multi-phase PWM controllers with external MOSFETs and external compensation.
The datasheets are normally well written and there is usually a good simulator model or design spreadsheet that calculates the optimal values for compensation. The real difficulty comes with layout and with parasitic effects. I had a recent example of this and wanted to share it with you.
I had a customer who had seen a brief transient spike that oscillated for a few nanoseconds every time the upper FET (it was a synchronously rectified design with a low-side FET replacing the Schottky free-wheeling diode for better efficiency) turned on. It appeared that the lower FET was also turning on briefly and the transient was ‘shoot-through’ where both FETs are conducting. If this goes on for a long period of time it can be bad news as you are effectively shorting the input supply to ground. However, in this case, it was a few nanoseconds so the worry was more the long-term reliability of the design.
The transient the customer was seeing was dVds/dt induced turn-on. When one FET is turned on or off, a step of voltage is applied between drain and source of the other device on the same leg. This step of voltage is coupled to the gate through the gate-to drain capacitance, and it can be large enough to turn the device on for a short instant. The way to solve this is to slow down the dVds/dt of the FETs.
In the case of synchronous buck converters, the rising edge of the switch node is generally the node that must be slowed down. One way to do this is to increase the upper FET gate drive resistance, to slow down the turn on. Remember that with power FETs you have to charge the gate capacitance so you effectively have an RC circuit with a time constant and increasing the resistance increases the time constant. Check the manufacturer’s data sheet but the value of this resistor is of the order of a few ohms.
The main disadvantage of this is that the switching losses are higher. The other issue is that as well as slowing down turn on it will also slow down turn off (which is already much slower than turn on). One way around this is to put a reverse diode in parallel to the gate resistor to allow a fast turn-off but a slower turn-on. I this case, the customer could not change the board layout but if you are laying out your own board, it’s worth putting in a link for a diode if needed, at least for the prototype board. I have also seen customers place a resistor in the bootstrap path to slow down only the turn-on speeds.
The ringing is caused by energy going back and forth between the gate-to drain capacitance and the gate lead inductance. It is good to keep the gate PCB trace as short as possible. Don’t ask how short is short! Also take note of the layout recommendations in the datasheet. For example, for this particular controller it recommends that Gate traces be run in pairs: UGATE+PHASE and LGATE+VSSP with trace widths at least 30mils thick. Oh, and never run any of the sensitive signals under the phase (switching) node…
Apart from that, it’s pretty simple.